Introducing PTLsim
PTLsim is a cycle accurate x86 microprocessor simulator and virtual machine for the x86 and x86-64 instruction sets. PTLsim models a modern superscalar out of order x86-64 compatible processor core at a configurable level of detail ranging from full-speed native execution on the host CPU all the way down to RTL level models of all key pipeline structures. In addition, all microcode, the complete cache hierarchy, memory subsystem and supporting hardware devices are modeled with true cycle accuracy. PTLsim supports the full x86-64 instruction set of the Pentium 4+, Athlon 64 and similar machines with all extensions (x86-64, SSE/SSE2/SSE3, MMX, x87). It is currently the only tool available to the public to support true cycle accurate modeling of real x86 microarchitectures.
PTLsim is very different from most cycle accurate simulators used in research applications. It runs directly on the same platform it is simulating (an x86-64 or x86 machine running Linux) and is able to switch in and out of full out of order simulation mode and native x86-64 mode at any time completely transparent to the running user code. This lets users quickly profile a small section of the user code without the overhead of emulating the uninteresting parts. PTLsim runs unmodified 32-bit x86 and 64-bit x86-64 applications without special compilers or toolchains.
PTLsim comes in two flavors. The standard version runs any 32-bit or 64-bit single threaded userspace Linux application. PTLsim/X integrates with the Xen hypervisor to provide full system x86-64 simulation, multi-processor and multi-threading support, cycle accurate device and timing models, and much more.
Compared to competing simulators, PTLsim provides extremely high performance even when running in full cycle accurate out of order simulation mode. Even with its optimized core, PTLsim still allows a significant amount of flexibility for easy experimentation.
PTLsim is used extensively in our Computer Architecture and Power-Aware Systems (CAPS) research group at the State University of New York at Binghamton, in addition to hundreds of major universities, industry research labs and several well known microprocessor vendors.
News
[19 Jan 2007] ISPASS Paper on PTLsim: Our recent ISPASS 2007 paper PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator has been released. It details how PTLsim can accurately model a real AMD Opteron (K8) processor on full system client server workloads. This paper will be presented (presentation PDF here) at ISPASS 2007.
[22 Dec 2006] Simultaneous Multithreading (SMT) model for PTLsim/X officially released! More details on the release are here. Documentation updates and a tutorial are coming soon.
[9 Oct 2006] PTLsim/X Officially Released! Our next generation version of PTLsim, supporting full system simulation, has been officially released. The PTLsim Manual contains all the details.
[25 Sep 2006] New version of the PTLsim Manual has been released. The Second Edition covers full system PTLsim/X, the new statistics interface, all feature updates and more. The official PTLsim/X release will be coming in a matter of days as we prepare example virtual machine images and do final testing.
[21 Aug 2006] LXR of PTLsim is now available. This is a searchable, cross referenced index of the entire PTLsim code base, plus our Xen enhancements.
