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GHB Implementation for M-Sim

GHB.h file for M-sim. Requires much less code to be moved into sim-outorder.c Most of the implementation is isolated to the ghb.h file. A basic list model is used to store pending loads (with their known hit/miss status) in order to better represent when a hit/miss is detected - this should result in better response time for the prefetcher implementations (although, this has yet to be seen). There is also a prefetch buffer that the GHB implementations can use. Currently, it is conservative (8 entry, 2 issue per cycle). Make sure to include ghb.h in your makefile for sim-outorder: "sim-outorder.$(OEXT): sim.h smt.h ghb.h"

Results for Markov Prefetcher

Single and Two-threaded results

Configuration Data

Information related to M-Sim implementation of a Global History Buffer


Results for Simple Next Line Prefetcher

Single Thread results

Double Thread results


Meeting on April 4, 2007

On this week, following papers will be discussed:

1. Predicting L2 Misses to Increase Issue-Queue Effecacy By: Enric Morancho, José María Llabería and Àngel Olivé link to paper

2. Speculation Techniques for Improving Load Related Instruction Scheduling By: Adi Yoaz, Mattan Erez, Ronny Ronen, and Stephan Jourdan link to paper


Meeting on March 28, 2007

On this week, following papers will be discussed:

1. Accelerating and Adapting Precomputation Threads for Efficient Prefetching By: W. Zhang, B. Calder, and D. Tullsen (University of California, San Diego)


Meeting on March 21, 2007

On this week, following papers will be discussed:

1. Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers By: S. Srinath (Microsoft and The University of Texas at Austin), O. Mutlu (Microsoft Research), H. Kim, and Y. Patt (University of Texas at Austin)

2. Memory Prefetching Using Adaptive Stream Detection By: Ibrahim Hur, University of Texas - Austin and IBM; Calvin Lin, University of Texas - Austin

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